| 000 -LEADER |
| fixed length control field |
01653 a2200277 4500 |
| 003 - CONTROL NUMBER IDENTIFIER |
| control field |
Nust |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
| control field |
20221129161303.0 |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
| LC control number |
98006335 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
| International Standard Book Number |
8186308733 |
| 040 ## - CATALOGING SOURCE |
| Transcribing agency |
Nust |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
| Classification number |
621.3815,INT |
| 245 00 - TITLE STATEMENT |
| Title |
Integrated circuit manufacturability : |
| Remainder of title |
the art of process and design integration / |
| Statement of responsibility, etc. |
edited by Jos⥠Pineda de Gyvez, Dhiraj Pradhan. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
| Place of publication, distribution, etc. |
Piscataway, NJ : |
| Name of publisher, distributor, etc. |
IEEE Press ; |
| Place of publication, distribution, etc. |
New York : |
| Name of publisher, distributor, etc. |
Institute of Electrical and Electronics Engineers, |
| Date of publication, distribution, etc. |
c1999. |
| 300 ## - PHYSICAL DESCRIPTION |
| Extent |
xv, 316 p. : |
| Other physical details |
ill. ; |
| Dimensions |
26 cm. |
| 505 ## - FORMATTED CONTENTS NOTE |
| Formatted contents note |
Introduction (Page-1), Defect Monitoring And Characterization (Page-9), Digital CMOS Fault Modeling And Inductive Fault Analysis (Page-43), Functional Yield Modeling (Page-85), Critical Area And Fault Probability Prediction (Page-121), Statistical Methods Of Parametric Yield And Quality Enhancement (Page-157), Architectural Fault Tolerance (Page-217), Design For Test And Manufacturability (Page-269), Testing Solutions For MCM Manufacturing (Page-287). |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Integrated circuits |
| General subdivision |
Testing. |
| 9 (RLIN) |
103765 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Metal oxide semiconductors, Complementary |
| General subdivision |
Computer-aided design. |
| 9 (RLIN) |
103794 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Telecommunication engineering |
| 700 2# - ADDED ENTRY--PERSONAL NAME |
| Personal name |
Pineda de Gyvez, Jos⥮ |
| 9 (RLIN) |
103795 |
| 700 2# - ADDED ENTRY--PERSONAL NAME |
| Personal name |
Pradhan, Dhiraj K. |
| 9 (RLIN) |
103796 |
| 710 2# - ADDED ENTRY--CORPORATE NAME |
| Corporate name or jurisdiction name as entry element |
IEEE Circuits and Systems Society. |
| 9 (RLIN) |
103691 |
| 856 42 - ELECTRONIC LOCATION AND ACCESS |
| Materials specified |
Contributor biographical information |
| Uniform Resource Identifier |
<a href="http://www.loc.gov/catdir/bios/wiley044/98006335.html">http://www.loc.gov/catdir/bios/wiley044/98006335.html</a> |
| 856 42 - ELECTRONIC LOCATION AND ACCESS |
| Materials specified |
Publisher description |
| Uniform Resource Identifier |
<a href="http://www.loc.gov/catdir/description/wiley037/98006335.html">http://www.loc.gov/catdir/description/wiley037/98006335.html</a> |
| 856 42 - ELECTRONIC LOCATION AND ACCESS |
| Materials specified |
Table of Contents |
| Uniform Resource Identifier |
<a href="http://www.loc.gov/catdir/toc/onix07/98006335.html">http://www.loc.gov/catdir/toc/onix07/98006335.html</a> |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
| Koha item type |
Reference |
| Source of classification or shelving scheme |
|