RTL hardware design using VHDL :(E-Book) (Record no. 191851)

000 -LEADER
fixed length control field 01408 a2200253 4500
003 - CONTROL NUMBER IDENTIFIER
control field Nust
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20170207154025.0
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER
LC control number 2005054234
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 0-471-72092-5 (alk. paper)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 978-0-471-72092-8
035 ## - SYSTEM CONTROL NUMBER
System control number (OCoLC)ocm61500103
035 ## - SYSTEM CONTROL NUMBER
System control number DAW07365004
040 ## - CATALOGING SOURCE
Transcribing agency Nust
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.39/2
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.392
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Chu, Pong P.,
245 10 - TITLE STATEMENT
Title RTL hardware design using VHDL :(E-Book)
Remainder of title coding for efficiency, portability, and scalability /
Statement of responsibility, etc. Pong P. Chu
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. Hoboken, N.J. :
Name of publisher, distributor, etc. Wiley-Interscience,
Date of publication, distribution, etc. cop. 2006
300 ## - PHYSICAL DESCRIPTION
Extent xxiii, 669 p. :
Other physical details ill. ;
Dimensions 26 cm.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction to digital system design -- Overview of hardware description languages -- Basic language constructs of VHDL -- Concurrent signal assignment statements of VHDL -- Sequential statements of VHDL -- Synthesis of VHDL code -- Combinational circuit design : practice -- Sequential circuit design : principle -- Sequential circuit design : practice -- Finite state machine : principle and practice -- Register transfer methodology : principle -- Register transfer methodology : practice -- Hierarchical design in VHDL -- Parameterized design : principle -- Parameterized design : practice -- Clock and synchronization : principle and practice.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Digital electronics
General subdivision Data processing.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element VHDL (Computer hardware description language)
651 ## - SUBJECT ADDED ENTRY--GEOGRAPHIC NAME
Geographic name (E-Book)
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type Book
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Collection code Permanent Location Current Location Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
            Military College of Signals (MCS) Military College of Signals (MCS) 12/12/2016   621.392 MCSEB-1135 12/08/2016 12/12/2016 Book
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