Digital systems design with VHDL and synthesis : (Record no. 214229)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01196 a2200193 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | Nust |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20221226110428.0 |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER | |
| LC control number | 9924750 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9812531610 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | Nust |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392,CHA |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Chang, K.C |
| 9 (RLIN) | 105882 |
| 245 ## - TITLE STATEMENT | |
| Title | Digital systems design with VHDL and synthesis : |
| Remainder of title | an integrated approach / |
| Statement of responsibility, etc. | K.C.Chang |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Washington |
| Name of publisher, distributor, etc. | IEEE computer society |
| Date of publication, distribution, etc. | 1999. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 499p |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Introduction (Page-1), VHDL and digital circuit primitives (Page-4), VHDL simulation and synthesis environment and design process (Page-32), Basic combinational circuits (Page-53), Basic binary arithmetic circuits (Page-91), Basic sequential circuits (Page-143), Registers (Page-187), Clock and reset circuits (Page-222), Dual port ram,fifo and dram modeling (Page-251), A design case study :finite impulse response filter asic design (Page-288), A design case study a microprogram controller design (Page-341),,Error detection and correction (Page-390), Fixed point multiplication (Page-408), Ffixed point division (Page-445), Floating -point arithmetic (Page-467). |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Digital systems design with VHDL and synthesis |
| 9 (RLIN) | 105883 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | |
| Koha item type | Book |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Permanent Location | Current Location | Shelving location | Date acquired | Full call number | Barcode | Date last seen | Price effective from | Koha item type | Public note |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Military College of Signals (MCS) | Military College of Signals (MCS) | General Stacks | 12/12/2016 | 621.392,CHA | MCS31818 | 12/08/2016 | 12/12/2016 | Book | Almirah No.40, Shelf No.1 |