ARCHITECTURE DESIGN OF JPEG CODEC ON FPGA / (Record no. 524635)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00502nam a22001817a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | NUST |
| 038 ## - RECORD CONTENT LICENSOR | |
| Staff Name | Mr. Zahoor |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 200 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | UBAID UMAR |
| 9 (RLIN) | 15438 |
| 245 ## - TITLE STATEMENT | |
| Title | ARCHITECTURE DESIGN OF JPEG CODEC ON FPGA / |
| Statement of responsibility, etc. | UBAID UMAR |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Islambad : |
| Name of publisher, distributor, etc. | CEME - NUST, |
| Date of publication, distribution, etc. | 2016. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | ill, x, 38 p. ; |
| 500 ## - GENERAL NOTE | |
| General note | Hardcover. |
| 600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
| Source of heading or term | Electrical Engineering - MS Thesis |
| 651 ## - SUBJECT ADDED ENTRY--GEOGRAPHIC NAME | |
| General subdivision | MS-Electrical Engineering |
| 9 (RLIN) | 132006 |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Relator code | Supervisor: Dr Usman Ali |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | |
| Koha item type | Thesis |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Permanent Location | Current Location | Shelving location | Date acquired | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Central Library (CL) | Central Library (CL) | Thesis | 06/24/2019 | 200 | CL-T- 39 | 06/24/2019 | 06/24/2019 | Thesis |