Designing with Xilinx® FPGAs Using Vivado (Record no. 615168)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00376nam a22001337a 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9783319424378 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | Nust |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| Author Mark | DES |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Churiwala, Sanjay |
| 9 (RLIN) | 131127 |
| 245 ## - TITLE STATEMENT | |
| Title | Designing with Xilinx® FPGAs Using Vivado |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Switzerland: |
| Name of publisher, distributor, etc. | Springer, |
| Date of publication, distribution, etc. | 2017. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Designing with Xilinx® FPGAs Using Vivado |
| 9 (RLIN) | 131128 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | |
| Koha item type | Book |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Permanent Location | Current Location | Shelving location | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| College of Electrical & Mechanical Engineering (CEME) | College of Electrical & Mechanical Engineering (CEME) | General Stacks | 10/15/2025 | 621.395 DES | CEME- 49325 | 10/15/2025 | 10/15/2025 | Book | ||||||
| College of Electrical & Mechanical Engineering (CEME) | College of Electrical & Mechanical Engineering (CEME) | General Stacks | 10/15/2025 | 621.395 DES | CEME- 49328 | 10/15/2025 | 10/15/2025 | Book |