Normal view
MARC view
- Churiwala, Sanjay
Entry Personal Name
001 - CONTROL NUMBER
- control field: 131127
003 - CONTROL NUMBER IDENTIFIER
- control field: NUST
005 - DATE AND TIME OF LATEST TRANSACTION
- control field: 20251015101234.0
008 - FIXED-LENGTH DATA ELEMENTS
- fixed length control field: 251015|| aca||aabn | a|a d
040 ## - CATALOGING SOURCE
- Original cataloging agency: NUST
- Transcribing agency: NUST
100 ## - HEADING--PERSONAL NAME
- Personal name: Churiwala, Sanjay
670 ## - SOURCE DATA FOUND
- Source citation: Work cat.: (NUST): Churiwala, Sanjay, Designing with Xilinx® FPGAs Using Vivado, 2017.
