Applied formal verification Douglas L. Perry
Publisher: New York. McGraw Hill 2005Description: xiv, 237p.: ill.; 24cmISBN: 007144372xDDC classification: 621.3815| Item type | Current location | Home library | Collection | Shelving location | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|---|
Book
|
Central Library (CL) | Central Library (CL) | NFIC | General Stacks | 621.3815 PER (Browse shelf) | Available | SEECS011479 |
Total holds: 0
Browsing Central Library (CL) shelves, Shelving location: General Stacks Close shelf browser
| 621.3815 NEU The PN junction diode | 621.3815 PER Digital integrated circuits: design-for-test using Simulink and Stateflow | 621.3815 PER Digital integrated circuits: design-for-test using Simulink and Stateflow | 621.3815 PER Applied formal verification | 621.3815 RAJ System-on-a-chip: design and test | 621.3815 RAS Microelectronic circuits : analysis and design | 621.3815 RAS Microelectronic circuits : analysis and design |
There are no comments on this title.