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FPGA based hardware design for solving positive definite system of linear equations using matrix exponential

By: Hassaan Saadat Material type: Text

TextPublisher: Islamabad NUST-SEECS 2015Description: 69p. CD IncludeDDC classification: MSEE-3 HAS Online resources: Click here to access online

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Item type	Current location	Home library	Collection	Shelving location	Call number	Status	Barcode
Thesis	Central Library (CL)	Central Library (CL)		Thesis	621.3 MSEE-3 HAS (Browse shelf)	Available	CL-T-4120
Thesis	Central Library (CL)	Central Library (CL)		Thesis	621.3 (Browse shelf)	Available	CL-T-3313
Project Report	Central Library (CL)	Central Library (CL)	NFIC	General Stacks	MSEE-3 HAS (Browse shelf)	Available	SEECSP01753

Total holds: 0

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Previous	MSEE-3 ALI Nonlinear bayesian estimation of fMRI bold signal under non-gaussian noise	MSEE-3 AMI Analysis of strength of CAPTCHA schemes	MSEE-3 GHA Sentiment analysis on autistic kids	MSEE-3 HAS FPGA based hardware design for solving positive definite system of linear equations using matrix exponential	MSEE-3 HIR Formalization of laplace transform using the multivariable calculus theory of HOL-Light	MSEE-3 MAR Unsupervised and online neural spike sorting for implantable brain machine interface	MSEE-3 MUB Adaptive digital calibration and decimation filter design for delta sigma ADC	Next

Supervisors: Dr. Osman Hasan, Dr. Ammar Hassan, Dr. Aamir Shafi

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