Formal verification of network on chip (NoC) architecture
Material type:
TextPublisher: Islamabad NUST-SEECS 2015Description: 67p. ill.; CD ROMDDC classification: MSEE-3 ZAM Online resources: Click here to access online
| Item type | Current location | Home library | Collection | Shelving location | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|---|
Thesis
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Central Library (CL) | Central Library (CL) | Thesis | 621.3 (Browse shelf) | Available | CL-T-3205 | |||
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Thesis
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Central Library (CL) | Central Library (CL) | REF | Reference | MSEE-3 ZAM (Browse shelf) | Available | SEECSP01764 |
Total holds: 0
Supervisors: Dr. Osman Hasan, Dr. M. Shahzad Younis, Dr. Rehan Hafiz, Ms. Hira Taqdees
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