Computer organization and architecture : designing for performance William Stallings.

By: Stallings, WilliamPublisher: Upper Saddle River, NJ : Pearson/Prentice Hall, c2006Edition: 7th edDescription: xiv, 778 p. : ill. ; 25 cmISBN: 0131856448Other title: Computer organization & architecture [Cover title]Subject(s): Computer architecture | Computer organizationDDC classification: 004.22,STA
Contents:
Reader’s Guide (Page-1), Computer Evolution and Performance (Page-16), A Top-Level View of Computer Function and Interconnection (Page-55), Cache Memory (Page-100), Internal Memory (Page-144), External Memory (Page-169), Input/ Output (Page-200), Operating System Support (Page-243), Computer Arithmetic (Page-289), Instruction Sets: Characteristics and Functions (Page-334), Instruction Sets: Addressing Modes and Forms (Page-386), Processor Structure and Functions (Page-415), Reduced Instruction Set Computers (Page-460), Instruction-Level Parallelism and Superscalar Processors (Page-500), The IA-64 Architecture (Page-535), Control Unit Operation (Page-571), Microprogrammed Control (Page-596), Parallel Processing (Page-638).
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Item type Current location Home library Shelving location Call number URL Status Notes Date due Barcode Item holds
Book Book Military College of Signals (MCS)
Military College of Signals (MCS)
Reference 004.22,STA (Browse shelf) Link to resource Available Almirah No.17, Shelf No.2 MCS36084
Total holds: 0

Reader’s Guide (Page-1), Computer Evolution and Performance (Page-16), A Top-Level View of Computer Function and Interconnection (Page-55), Cache Memory (Page-100), Internal Memory (Page-144), External Memory (Page-169), Input/ Output (Page-200), Operating System Support (Page-243), Computer Arithmetic (Page-289), Instruction Sets: Characteristics and Functions (Page-334), Instruction Sets: Addressing Modes and Forms (Page-386), Processor Structure and Functions (Page-415), Reduced Instruction Set Computers (Page-460), Instruction-Level Parallelism and Superscalar Processors (Page-500), The IA-64 Architecture (Page-535), Control Unit Operation (Page-571), Microprogrammed Control (Page-596), Parallel Processing (Page-638).

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