NUST Institutions Library Catalogue

Bit Parallel Computation of SBNDM4 Algorithm Using Scalable Parallel Hardware / Muhammad Tahir Rana.

By: Muhammad Tahir RanaContributor(s): Supervisor. Dr. Naeem AbbasMaterial type: TextTextPublisher: Karachi. PNEC - NUST, 2017Description: iv, 57 p. : ill. ; 30cmSubject(s): MS- Electrical EngineeringDDC classification: 200 Online resources: Click here to access online
Tags from this library: No tags from this library for this title. Log in to add tags.
Item type Current location Home library Shelving location Call number Status Date due Barcode Item holds
Soft Copy Central Library (CL)
Central Library (CL)
Thesis 200 (Browse shelf) Available CL-T-6212
Total holds: 0

There are no comments on this title.

to post a comment.
© 2023 Central Library, National University of Sciences and Technology. All Rights Reserved.