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IMPLEMENTATION & EVALUATION OF LOW AREA AND HIGH SPEED DESIGN ARCHITECTURES OF SHA-3 CANDIDATE BLAKE ON AN FPGA PLATFORM / Muhammad Arsalan

By: Muhammad ArsalanContributor(s): Dr. Arshad AzizMaterial type: TextTextPublisher: Islamabad : PNEC - NUST, 2012Description: ix, 44 p. : ill. ; 30cmSubject(s): Electrical Engineering MS-ThesisDDC classification: 621.3
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Item type Current location Home library Shelving location Call number Status Date due Barcode Item holds
Thesis Thesis Central Library (CL)
Central Library (CL)
Thesis 621.3 (Browse shelf) Available CL-T-5990
Total holds: 0

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