RTL hardware design using VHDL : coding for efficiency, portability, and scalability coding for efficiency, portability, and scalability Pong P. Chu.
Publisher: Hoboken, NJ : J. Wiley & Sons, 2006Description: 669 p. : ill. ; 27 cmISBN: 0471720925; 0471720925Other title: RTL hardware design using VHDL [electronic resource]Subject(s): Digital electronics -- Data processing | VHDL (Computer hardware description language)Online resources: Click here to access online| Item type | Current location | Home library | Collection | Shelving location | Call number | Status | Date due | Barcode | Item holds |
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Central Library (CL) | Central Library (CL) | NFIC | General Stacks | 621.392 CHU (Browse shelf) | Available | SEECS007793 |
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| 621.392 BRO Fundamentals of digital logic with Verilog design | 621.392 BRO Fundamentals of digital logic with Verilog design | 621.392 CAV VeriIog HDL: digital design and modeling | 621.392 CHU RTL hardware design using VHDL : coding for efficiency, portability, and scalability | 621.392 CIL Starter's guide to verilog 2001 | 621.392 CIL Starter's guide to verilog 2001 | 621.392 CIL Starter's guide to verilog 2001 |
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