VeriIog HDL: digital design and modeling digital design and modeling Joseph Cavanagh
Publisher: Boca Raton, FL : CRC Press, c2007Description: xviii, 900 p. : ill. ; 26 cmSubject(s): Digital electronics | Logic circuits -- Computer-aided design | Verilog (Computer hardware description language)DDC classification: 621.392| Item type | Current location | Home library | Collection | Shelving location | Call number | Status | Date due | Barcode | Item holds |
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Central Library (CL) | Central Library (CL) | NFIC | General Stacks | 621.392 CAV (Browse shelf) | Available | SEECS008863 | ||
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Central Library (CL) | Central Library (CL) | General Stacks | 621.392 CAV (Browse shelf) | Checked out | 02/21/2026 | SEECS008593 |
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| 621.392 BHA A VHDL primer | 621.392 BRO Fundamentals of digital logic with Verilog design | 621.392 BRO Fundamentals of digital logic with Verilog design | 621.392 CAV VeriIog HDL: digital design and modeling | 621.392 CHU RTL hardware design using VHDL : coding for efficiency, portability, and scalability | 621.392 CIL Starter's guide to verilog 2001 | 621.392 CIL Starter's guide to verilog 2001 |
Includes index.
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