00586 a2200133 4500 - Shahnawaz Janjua 93357 Design and FPGA based implementation of barker demodulation block and CCK correlator block for DSSS technique in IEEE 802.11g Shahnawaz Janjua Islamabad : NUST School of Electrical Engineering & Computer Science, 2009. 106 p. : ill. ; 27 cm + CD-ROM Supervisors : Dr. N D Gohar, Mr. Bilal Saqib. http://10.250.8.41:8080/xmlui/handle/123456789/29685 PR BICSE-3 SHA ddc 10031 10031 2 0 0 0 CL CL 2022-07-04 BICSE-3 SHA SEECSP00796 2012-11-14 2012-11-14 PR