TY  - GEN
AU  - Vandenbussche,J.
AU  - Gielen,Georges
AU  - Steyaert,Michiel
TI  - Systematic design of analog IP blocks
U1  - 621.395,VAN 
PY  - 2003///
CY  - Boston
PB  - Kluwer Academic Publishers
KW  - Integrated circuit layout
KW  - Integrated circuits
KW  - Very large scale integration
KW  - Design and construction
KW  - Metal oxide semiconductors, Complementary
N1  - Introduction (Page-1), Design Methodologies for Analog IP (Page-11), Systematic Design of a  Partical Detector Front End (Page-35), Systematic Design of CMOS Current Steering D/A Concerters (Page-83), Systematic Design of an Interpolating/Averaging A/D Converter (Page-139), General Conclusions (Page-179)
UR  - http://www.loc.gov/catdir/enhancements/fy0820/2003048950-d.html
ER  -