<?xml version="1.0" encoding="UTF-8"?>
<mods xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://www.loc.gov/mods/v3" version="3.1" xsi:schemaLocation="http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-1.xsd">
  <titleInfo>
    <title>Computer architecture</title>
    <subTitle>pipelined and parallel processor design</subTitle>
  </titleInfo>
  <name type="personal">
    <namePart>Flynn, Michael J.</namePart>
    <role>
      <roleTerm authority="marcrelator" type="text">creator</roleTerm>
    </role>
  </name>
  <typeOfResource/>
  <originInfo>
    <place>
      <placeTerm type="text">Boston, MA</placeTerm>
    </place>
    <publisher>Jones and Bartlett</publisher>
    <dateIssued>c1995</dateIssued>
    <issuance/>
  </originInfo>
  <physicalDescription>
    <extent>xix, 788 p. : ill. ; 26 cm.</extent>
  </physicalDescription>
  <tableOfContents>Architecture and Machines (Page-1) Time Area and Instruction Sets (Page-63) Data How Programs Behave (Page-141) Pipelined Processor  Design (Page-181) Cache Memory (Page-265) Memory System Design (Page-345) Concurrent Processors (Page-425) Shared Memory Multiprocessors (Page-511) I/O and the Storage Hierarchy (Page-599)  Processor Studies (Page-663) </tableOfContents>
  <note type="statement of responsibility">Michael J. Flynn.</note>
  <note>Almirah No. 3 and Shelf No.1</note>
  <subject authority="lcsh">
    <topic>Computer architecture</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Microprocessors</topic>
    <topic>Design and construction</topic>
  </subject>
  <classification authority="ddc">004.22</classification>
  <identifier type="isbn">817319100X</identifier>
  <identifier type="lccn">94041225</identifier>
  <recordInfo>
    <recordContentSource authority="marcorg"/>
    <recordChangeDate encoding="iso8601">20170207152521.0</recordChangeDate>
  </recordInfo>
</mods>
