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  <titleInfo>
    <title>Digital system design with VHDL</title>
  </titleInfo>
  <name type="personal">
    <namePart>Zwolinki, Mark</namePart>
    <role>
      <roleTerm authority="marcrelator" type="text">creator</roleTerm>
    </role>
  </name>
  <typeOfResource/>
  <originInfo>
    <place>
      <placeTerm type="text">Harlow, England</placeTerm>
    </place>
    <place>
      <placeTerm type="text">New York</placeTerm>
    </place>
    <publisher>Prentice Hall</publisher>
    <dateIssued>2000</dateIssued>
    <edition>2nd Edition </edition>
    <issuance/>
  </originInfo>
  <physicalDescription>
    <extent>xii,368p. : ill. ; 24 cm.</extent>
  </physicalDescription>
  <tableOfContents>Introduction (Page-1), Combinational Logic Design (Page-19), Combinational Logic Using VHDL Gate Models (Page-38), Combinational Building Blocks (Page-53), Synchronous Sequential Design (Page-80), VHDL Models of Sequential Blocks (Page-115), VHDL Simulation (Page-178), VHDL  Synthesis (Page-190), Testing Digital Systems (Page-221), Design for Testability (Page-248), Asynchronous Sequential Design (Page-271), Interfacing with the Analogue World (Page-301). </tableOfContents>
  <note type="statement of responsibility">Mark Zwolinki.</note>
  <subject authority="lcsh">
    <topic>Digital electronics</topic>
    <topic>Data processing</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Telecommunication Engineering</topic>
  </subject>
  <classification authority="ddc">621.38121,ZWO</classification>
  <identifier type="isbn">8129706504</identifier>
  <identifier type="lccn">99088375</identifier>
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    <recordChangeDate encoding="iso8601">20221123115106.0</recordChangeDate>
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