Bardell, Paul H. <br/><br/>
Built-in test for VLSI :  pseudorandom techniques / 
Paul H. Bardell, William H. McAnney, Jacob Savir. 
 - New York :  Wiley,  c1987. 
 - xiii, 354 p. :  ill. ;  24 cm. 
<br/><br/>Digital Testing and the Need for Testable (Page-1), Introduction to Testable Design (Page-17), Pseudorandom Sequence Generators (Page-61), Test Response Compression Techniques (Page-89), Shift Register Polynomial Division (Page-109), Special Purpose Shift Register Circuits (Page-145), Random Pattern Built-in Test (Page-177), Built –in Test Structures (Page-279), Limitations and other Concerns of Random Pattern Testing (Page-314), Test System Requirements for Built-In Test (Page-311). 
<br/><br/><label>ISBN: </label>0471624632 
<br/><br/><label>LCCN: </label>87023013 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Telecommunication engineering
<br/><br/><label>Dewey Class. No.: </label>621.3815,BAR