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  <titleInfo>
    <title>Built-in test for VLSI</title>
    <subTitle>pseudorandom techniques</subTitle>
  </titleInfo>
  <name type="personal">
    <namePart>Bardell, Paul H.</namePart>
    <role>
      <roleTerm authority="marcrelator" type="text">creator</roleTerm>
    </role>
  </name>
  <name type="personal">
    <namePart>McAnney, William H.</namePart>
  </name>
  <name type="personal">
    <namePart>Savir, Jacob.</namePart>
  </name>
  <typeOfResource/>
  <originInfo>
    <place>
      <placeTerm type="text">New York</placeTerm>
    </place>
    <publisher>Wiley</publisher>
    <dateIssued>c1987</dateIssued>
    <issuance/>
  </originInfo>
  <physicalDescription>
    <extent>xiii, 354 p. : ill. ; 24 cm.</extent>
  </physicalDescription>
  <tableOfContents>Digital Testing and the Need for Testable (Page-1), Introduction to Testable Design (Page-17), Pseudorandom Sequence Generators (Page-61), Test Response Compression Techniques (Page-89), Shift Register Polynomial Division (Page-109), Special Purpose Shift Register Circuits (Page-145), Random Pattern Built-in Test (Page-177), Built –in Test Structures (Page-279), Limitations and other Concerns of Random Pattern Testing (Page-314), Test System Requirements for Built-In Test (Page-311).</tableOfContents>
  <note type="statement of responsibility">Paul H. Bardell, William H. McAnney, Jacob Savir.</note>
  <subject authority="lcsh">
    <topic>Telecommunication engineering</topic>
  </subject>
  <classification authority="ddc">621.3815,BAR</classification>
  <identifier type="isbn">0471624632</identifier>
  <identifier type="lccn">87023013</identifier>
  <identifier type="uri">http://www.loc.gov/catdir/description/wiley033/87023013.html</identifier>
  <identifier type="uri">http://www.loc.gov/catdir/toc/onix04/87023013.html</identifier>
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