TY  - GEN
AU  - Ghosh,Abhijit
AU  - Devadas,Srinivas
AU  - Newton,A.Richard
TI  - Sequential logic testing and verification
SN  - 0792391888 (alk. paper)
U1  - 621.395,GHO 
PY  - 1992///
CY  - Boston
PB  - Kluwer Academic
KW  - Computer-aided design
KW  - Logic circuits
KW  - Testing
KW  - Logic design
N1  - Introduction (Page-1), Sequential Tesst Generation (Page-11), Test Generation Using RTL Descriptions (Page-57), Symbolic FSM Traversal Methods (Page-153),,Sequential Synthesis for Tesability (Page-97), Verification of Sequentila Circuits (Page-123)
ER  -