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  <titleInfo>
    <title>System level design model with reuse of system IP (E-BOOK)</title>
  </titleInfo>
  <name type="personal">
    <namePart>Cavalloro, Patrizia.</namePart>
  </name>
  <typeOfResource/>
  <originInfo>
    <place>
      <placeTerm type="text">Boston</placeTerm>
    </place>
    <publisher>Kluwer Academic Publishers</publisher>
    <dateIssued>c2003</dateIssued>
    <issuance/>
  </originInfo>
  <physicalDescription>
    <extent>211 p. : ill. ; 25 cm.</extent>
  </physicalDescription>
  <note type="statement of responsibility">edited by Patrizia Cavalloro ... [et al.].</note>
  <subject authority="lcsh">
    <topic>Modularity (Engineering)</topic>
  </subject>
  <subject authority="lcsh">
    <topic>System design</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Systems on a chip</topic>
    <topic>Design and construction</topic>
  </subject>
  <classification authority="ddc">004.6</classification>
  <identifier type="isbn">1402075944 (alk. paper)</identifier>
  <identifier type="lccn">2003061861</identifier>
  <identifier type="uri">http://www.loc.gov/catdir/toc/fy0612/2003061861.html</identifier>
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    <url displayLabel="Table of contents only">http://www.loc.gov/catdir/toc/fy0612/2003061861.html</url>
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