TY  - GEN
AU  - Ali, Sajjad (MSCS-19) 
TI  - Formal Verification of Embedded Systems 
U1  - 005.1  
PY  - 2015///
CY  - Rawalpindi 
PB  - MCS,NUST 
KW  - PG Thesis
KW  - MSCS-19
N1  - Introduction (Page-1) Literature Review (Page-10) Proposed Methodology (Page-21) Preliminaries (Page-29) Case Studies (Page-35) Results and Discussion, Future work and Conclusion (Page-75)
ER  -