TY  - BOOK
AU  - Navabi, Zainalabedin
TI  - Verilog Digital System Design: Register Transfer Level Synthesis, Testbench and Verification
SN  - 9780070252219
U1  - 621.392 NAV  
PY  - 2013///
CY  - New Dehli
PB  - Mc Graw Hill Education
KW  - Verilog Digital System Design
ER  -