Zainalabedin Navabi <br/><br/>
Verilog Digital System Design  Register Transfer Level Synthesis, Testbench, and Verification 

 - Second Edition, 
 - India:  McGraw Hill Education,  2013. 
<br/><br/><label>ISBN: </label>9780070252219 
<br/><br/><label>Subjects--Topical Terms: </label>
<br/><br/><label>Dewey Class. No.: </label>621.392  / NAV