TY  - BOOK
AU  - Zainalabedin Navabi
TI  - Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification
SN  - 9780070252219
U1  - 621.392 
PY  - 2013///
CY  - India
PB  - McGraw Hill Education
KW  - Verilog Digital System Design
ER  -