00903 a2200205 4500 0071445641 DLC DLC 621.392 Navabi, Zainalabedin. Verilog digital system design: RT level synthesis, testbench and verification RT level synthesis, testbench and verification Zainalabedin Navabi. 2nd ed. New York : McGraw-Hill, c2006. xvi, 384 p. : ill. ; 24 cm. + 1 CD-ROM (4 3/4 in.) McGraw-Hill electronic engineering Verilog (Computer hardware description language) Electronic digital computers Computer-aided design. Publisher description http://www.loc.gov/catdir/enhancements/fy0668/2006271457-d.html Table of contents only http://www.loc.gov/catdir/enhancements/fy0668/2006271457-t.html BK 621.392 NAV ddc 9539 9539 0 0 0 0 NFIC CL CL GEN 2006-04-05 Allied Book Company 5774.52 7 4 621.392 NAV SEECS007225 2025-06-16 2024-10-17 2017-01-05 BK 0 0 0 0 NFIC CL CL GEN 2009-10-16 Star Books 7127.65 5 5 621.392 NAV SEECS009814 2025-06-16 2025-05-17 2017-01-05 BK 0 0 0 0 NFIC CL CL GEN 2006-04-05 Allied Book Company 5774.52 3 6 621.392 NAV SEECS007226 2025-08-25 2021-03-15 2017-01-05 BK