Built-in test for VLSI : pseudorandom techniques / Paul H. Bardell, William H. McAnney, Jacob Savir.
Publisher: New York : Wiley, c1987Description: xiii, 354 p. : ill. ; 24 cmISBN: 0471624632Subject(s): Telecommunication engineeringDDC classification: 621.3815,BAR Online resources: Publisher description | Table of Contents
Contents:
Digital Testing and the Need for Testable (Page-1), Introduction to Testable Design (Page-17), Pseudorandom Sequence Generators (Page-61), Test Response Compression Techniques (Page-89), Shift Register Polynomial Division (Page-109), Special Purpose Shift Register Circuits (Page-145), Random Pattern Built-in Test (Page-177), Built –in Test Structures (Page-279), Limitations and other Concerns of Random Pattern Testing (Page-314), Test System Requirements for Built-In Test (Page-311).
| Item type | Current location | Home library | Shelving location | Call number | URL | Status | Notes | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|---|---|
Book
|
Military College of Signals (MCS) | Military College of Signals (MCS) | General Stacks | 621.3815,BAR (Browse shelf) | Link to resource | Available | Almirah No.32, Shelf No.5 | MCS1047 |
Total holds: 0
Digital Testing and the Need for Testable (Page-1), Introduction to Testable Design (Page-17), Pseudorandom Sequence Generators (Page-61), Test Response Compression Techniques (Page-89), Shift Register Polynomial Division (Page-109), Special Purpose Shift Register Circuits (Page-145), Random Pattern Built-in Test (Page-177), Built –in Test Structures (Page-279), Limitations and other Concerns of Random Pattern Testing (Page-314), Test System Requirements for Built-In Test (Page-311).
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