Reconfigureable architecture for ISOMER implementation of FPGA
Material type:
TextPublisher: Islamabad NUST-SEECS 2015Description: 55p. 27cm. CD IncludesDDC classification: MSEE-4 SHA Online resources: Click here to access online
| Item type | Current location | Home library | Collection | Shelving location | Call number | Status | Date due | Barcode | Item holds |
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Thesis
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Central Library (CL) | Central Library (CL) | Thesis | 621.3 MSEE-4 SHA (Browse shelf) | Available | CL-T-2520 | |||
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Thesis
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Central Library (CL) | Central Library (CL) | Thesis | 621.3 MSEE-4 SHA (Browse shelf) | Available | CL-T-3160 | |||
Project Report
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Central Library (CL) | Central Library (CL) | NFIC | General Stacks | MSEE-4 SHA (Browse shelf) | Available | SEECSP01829 |
Total holds: 0
Supervisors: Dr. Rehan Hafiz, Dr. Khawar Khurshid, Dr. Osman Hasan, Dr. Awais Mehmood Kamboh
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