Sequential logic testing and verification / Abhijit Ghosh, Srinivas Devadas, A. Richard Newton.
Series: The Kluwer international series in engineering and computer science ; SECS 163Publisher: Boston : Kluwer Academic, c1992Description: xv, 214 p. : ill. ; 24 cmISBN: 0792391888 (alk. paper)Subject(s): Computer-aided design | Logic circuits -- Testing | Logic designDDC classification: 621.395,GHO
Contents:
Introduction (Page-1), Sequential Tesst Generation (Page-11), Test Generation Using RTL Descriptions (Page-57), Symbolic FSM Traversal Methods (Page-153),,Sequential Synthesis for Tesability (Page-97), Verification of Sequentila Circuits (Page-123),
| Item type | Current location | Home library | Shelving location | Call number | URL | Status | Notes | Date due | Barcode | Item holds |
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Book
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Military College of Signals (MCS) | Military College of Signals (MCS) | General Stacks | 621.395,GHO (Browse shelf) | Link to resource | Available | Almirah No.40, Shelf No.2 | MCS511 |
Total holds: 0
Introduction (Page-1), Sequential Tesst Generation (Page-11), Test Generation Using RTL Descriptions (Page-57), Symbolic FSM Traversal Methods (Page-153),,Sequential Synthesis for Tesability (Page-97), Verification of Sequentila Circuits (Page-123),
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