Hardware description languages : concepts and principles / Sumit Ghosh.
Series: IEEE Press series on microelectronic systemsPublisher: New York : IEEE Press, c2000Description: xxiii, 241 p. : ill. ; 27 cmSubject(s): Computer hardware description languagesDDC classification: 621.392,GHO Online resources: Contributor biographical information | Publisher description | Table of Contents
Contents:
The Origin of HDLs (Page-1), Evolutionary Development of the Early HDLs (Page-7), Fundamental Requirements of Behavior Level HDLs (Page-19), The First Behavior Level HDL-ADLIB-SABLE (Page-45), Verilog HDL (Page-63),Design of Concurrent HDL in Ada from First Principles (Page-75), VHDL (Page-95), Case Studies (Page-117), Simulation Algorithms for Concurrent Execution of HDLs on Loosely Coupled (Page-139), On The Concept of Transport Delay in HDLs (Page-191), The future of HDLs and Philosophical Reflections (Page-225),
| Item type | Current location | Home library | Shelving location | Call number | URL | Status | Notes | Date due | Barcode | Item holds |
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Reference
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Military College of Signals (MCS) | Military College of Signals (MCS) | Reference | 621.392,GHO (Browse shelf) | Link to resource | Not for loan | Almirah No.24, Shelf No.1 | MCS31838 |
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The Origin of HDLs (Page-1), Evolutionary Development of the Early HDLs (Page-7), Fundamental Requirements of Behavior Level HDLs (Page-19), The First Behavior Level HDL-ADLIB-SABLE (Page-45), Verilog HDL (Page-63),Design of Concurrent HDL in Ada from First Principles (Page-75), VHDL (Page-95), Case Studies (Page-117), Simulation Algorithms for Concurrent Execution of HDLs on Loosely Coupled (Page-139), On The Concept of Transport Delay in HDLs (Page-191), The future of HDLs and Philosophical Reflections (Page-225),
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