000			01419 a2200241 4500
003			Nust
005			20230901122420.0
010			_a 99027111
020			_c0780347447
040			_cNust
082	0	0	_a621.392,GHO
100	1		_aGhosh, Sumit, _993893
245	1	0	_aHardware description languages : _bconcepts and principles / _cSumit Ghosh.
260			_aNew York : _bIEEE Press, _cc2000.
300			_axxiii, 241 p. : _bill. ; _c27 cm.
440		0	_aIEEE Press series on microelectronic systems _999208
505			_aThe Origin of HDLs (Page-1), Evolutionary Development of the Early HDLs (Page-7), Fundamental Requirements of Behavior Level HDLs (Page-19), The First Behavior Level HDL-ADLIB-SABLE (Page-45), Verilog HDL (Page-63),Design of Concurrent HDL in Ada from First Principles (Page-75), VHDL (Page-95), Case Studies (Page-117), Simulation Algorithms for Concurrent Execution of HDLs on Loosely Coupled (Page-139), On The Concept of Transport Delay in HDLs (Page-191), The future of HDLs and Philosophical Reflections (Page-225),
650		0	_aComputer hardware description languages. _999272
856	4	2	_3Contributor biographical information _uhttp://www.loc.gov/catdir/bios/wiley043/99027111.html
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/description/wiley036/99027111.html
856	4	2	_3Table of Contents _uhttp://www.loc.gov/catdir/toc/onix07/99027111.html
942			_cREF _2ddc
999			_c178425 _d178425