| 000 | 01064 a2200217 4500 | ||
|---|---|---|---|
| 003 | Nust | ||
| 005 | 20221123115106.0 | ||
| 010 | _a 99088375 | ||
| 020 | _a8129706504 | ||
| 040 | _cNust | ||
| 082 | 0 | 0 | _a621.38121,ZWO |
| 100 | 1 |
_aZwolinki, Mark _9103409 |
|
| 245 | 1 | 0 |
_aDigital system design with VHDL / _cMark Zwolinki. |
| 250 | _a2nd Edition | ||
| 260 |
_aHarlow, England ; _aNew York : _bPrentice Hall, _c2000. |
||
| 300 |
_axii,368p. : _bill. ; _c24 cm. |
||
| 505 | _aIntroduction (Page-1), Combinational Logic Design (Page-19), Combinational Logic Using VHDL Gate Models (Page-38), Combinational Building Blocks (Page-53), Synchronous Sequential Design (Page-80), VHDL Models of Sequential Blocks (Page-115), VHDL Simulation (Page-178), VHDL Synthesis (Page-190), Testing Digital Systems (Page-221), Design for Testability (Page-248), Asynchronous Sequential Design (Page-271), Interfacing with the Analogue World (Page-301). | ||
| 650 | 0 |
_aDigital electronics _xData processing. _994834 |
|
| 650 | 0 | _aTelecommunication Engineering | |
| 942 |
_2ddc _cBK |
||
| 999 |
_c178611 _d178611 |
||