000			01336 a2200253 4500
003			Nust
005			20221202120255.0
010			_a 2005279300
020			_a0750645822 (pbk.)
040			_cNust
082			_a621.38153,HOL
100	1		_aHoldsworth, B. _965867
245	1	0	_aDigital logic design / _cB. Holdsworth and R.C. Woods.
250			_a2nd ed. /
260			_aOxford ; _aBoston : _bNewnes, _c2002.
300			_axi, 519 p. : _bill. ; _c25 cm.
505			_aBoolean Algebra (Page-1),Karnaugh Maps and Function Simplification (Page-16), NAND and NOR Logic (Page-49), Combinational Logic Design (Page-70), Single—Bit Memory Elements (Page-91), Counters (Page-113), Shift Register Counters and Generators (Page-143), Clock-Driven Sequential Circuits (Page-170), Event-Driven Circuits (Page-208), Digital Deign with MSI (Page-233), Arithmetic Circuits (Page-270), Hazards (Page-314), Faults Diagrams in Combinational Circuits (Page-336), Coding System for Error Control (Page-385).
650		0	_aLogic design. _917983
650		0	_aTelecommunication Engineering
700	1		_aWoods, R. C. _9104006
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0626/2005279300-d.html
856	4	2	_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0626/2005279300-t.html
942			_2ddc _cBK
999			_c182383 _d182383