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| 005 | 20221227122830.0 | ||
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| 020 | _a0130449113 | ||
| 040 | _cNust | ||
| 082 | 0 | 0 | _a621.392,PAL |
| 100 | 1 |
_aPalnitkar, Samir. _924133 |
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| 245 | 1 | 0 |
_aVerilog HDL : _ba guide to digital design and synthesis / _cSamir Palnitkar |
| 250 | _a2nd ed. | ||
| 260 |
_aUpper Saddle River, NJ : _bSunSoft Press, _cc2003. |
||
| 300 |
_axlii, 450 p. : _bill. ; _c25 cm. + _e1 CD-ROM (4 3/4 in.) |
||
| 505 | _aPart.1: Basic Verilog Topics 1 (Page-1), Part.2 Advanced VerilogTopics (Page-213), Part.3 Appendices (Page-361). | ||
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 942 |
_2ddc _cBK |
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| 999 |
_c185948 _d185948 |
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