000			01775 a2200265 4500
003			Nust
005			20170207154027.0
010			_a 2005054234
020			_a0471720925 (alk. paper)
020			_a9780471720928
035			_a(OCoLC)ocm61500103
040			_cNust
082	0	0	_a621.392
100	1		_aChu, Pong P.,
245	1	0	_aRTL hardware design using VHDL :coding for efficiency, portability, and scalability -(E-BOOK) _cPong P. Chu.
260			_aHoboken, N.J. : _bWiley-Interscience, _cc2006.
300			_axxiii, 669 p. : _bill. ; _c26 cm.
500			_aIntroduction to Digital System Design (Page-1) Overview of Hardware Description Languages (Page-23) Basic Language Constructs of VHDL (Page-43) Concurrent Signal Assignment Statements of VHDL 69 (Page-69 )Sequential Statements of VHDL (Page-97)Synthesis Of VHDL Code (Page-125 )Combinational Circuit Design: Practice(Page-163)Sequential Circuit Design: Principle (Page-213)Sequential Circuit Design: Practice (Page-257)Finite State Machine: Principle and Practice (Page-313)Register Transfer Methodology: Principle (Page-373)Register Transfer Methodology: Practice (Page-421)Hierarchical Design in VHDL ( 473)Parameterized Design: Principle (Page-499)Parameterized Design: Practice (Page-545) Clock and Synchronization: Principle and Practice (Page-603)
650		0	_aDigital electronics _xData processing.
650		0	_aVHDL (Computer hardware description language)
651			_aE-BOOK
856	4	2	_3Contributor biographical information _uhttp://www.loc.gov/catdir/enhancements/fy0740/2005054234-b.html
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0625/2005054234-d.html
856	4	2	_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0653/2005054234-t.html
942			_2ddc _cBK
999			_c191964 _d191964