000 00728 a2200217 4500
003 Nust
005 20170207165831.0
010 _a 2003061861
020 _a1402075944 (alk. paper)
035 _a(OCoLC)ocm52784660
040 _cNust
082 0 0 _a004.6
245 0 0 _aSystem level design model with reuse of system IP (E-BOOK)
_cedited by Patrizia Cavalloro ... [et al.].
260 _aBoston :
_bKluwer Academic Publishers,
_cc2003.
300 _a211 p. :
_bill. ;
_c25 cm.
650 0 _aModularity (Engineering)
650 0 _aSystem design.
650 0 _aSystems on a chip
_xDesign and construction.
700 1 _aCavalloro, Patrizia.
856 4 1 _3Table of contents only
_uhttp://www.loc.gov/catdir/toc/fy0612/2003061861.html
942 _2ddc
_cBK
999 _c213285
_d213285