000 00842nam a22002057a 4500
999 _c23868
_d23868
003 NUST - PNEC
005 20170621100542.0
008 150915b xxu||||| |||| 00| 0 eng d
020 _a8129700921
040 _cRCMS
_aDLC
_bDLC
050 _a621.392 PAL
082 _a621.392 PAL
_22nd ed.
100 _910530
_aSamir Palnitkar
245 _aVerilog HDL : a guide to digital design and synthesis
_cSamir Palnitkar
250 _a2nd ed.
260 _cc.2003
_aIndia
_bPerson Education
300 _axlii, 450 p. :
_bill, ;
_c26 cm.
538 _iShelf # 09, Row # 1, History & Digital Design.
650 _910531
_aVerilog (Computer hardware description language)
_xMIS
856 _3Table of Contents Only.
942 _2ddc
_cBK
_h621.392 PAL