| 000 | 00517nam a22001817a 4500 | ||
|---|---|---|---|
| 003 | CEME | ||
| 005 | 20210628202757.0 | ||
| 008 | 210118b xxu||||| |||| 00| 0 eng d | ||
| 020 | _a9812-53-131-9 | ||
| 040 | _c. | ||
| 082 | _a621.392 PAD | ||
| 100 |
_aPadmanabhan, T.R,Sundari, B.Bala Tripura _961569 |
||
| 245 | _aDesign through verilog hdl | ||
| 260 |
_aNEW DELHI _bJOHN WILEY _c2004 |
||
| 300 | _aXII,455 P | ||
| 650 |
_aVERILOG(COMPUTER HARDWARE DESCRIPTION LANGUAGE). VERILOG HDL _961570 |
||
| 942 |
_cBK _2ddc |
||
| 999 |
_c570979 _d570979 |
||