000			01607cam a2200325 a 4500
001			16996687
003			NUST
005			20220722100316.0
008			111012s2013 njua 001 0 eng
010			_a 2011039094
020			_a978-1-292-23116-7
040			_aDLC _cDLC
042			_apcc
050	0	0	_aTK7888.3 _b.M343 2013
082	0	0	_a621.395, MAN _223
100	1		_aMano, M. Morris, _d1927- _920186
245	1	0	_aDigital design : _bwith a introduction to the verilog hdl / _cM. Morris Mano, Michael D. Ciletti.
250			_a6th ed. _bGlobal Edition
260			_aUK _bPearson Prentice Hall, _c2019.
300			_a710 pages _bill. ; _c25 cm.
505			_aChapter 1- Digital Systems and Binary Numbers (Page-17), Chapter 2- Boolean Algebra and Logic Gates (Page-57),Chapter 3- Gate-Level Minimization (Page-98),Chapter 4- Combinational Logic (Page-163),Chapter 5- Synchronous Sequential Logic (Page-261),Chapter 6- Registers and Counters (Page-342),Chapter 7- Memory and Programmable Logic (Page-393),Chapter 8- Design at the Register Transfer Level (Page-445),Chapter 9- Laboratory Experiments with Standard ICs and FPGAs (Page-571),Chapter 10- Standard Graphic Symbols (Page-621).
650		0	_aElectronic digital computers _xCircuits. _936507
650		0	_aLogic circuits. _917982
650		0	_aLogic design. _917983
650		0	_aDigital integrated circuits. _961563
700	1		_aCiletti, Michael D. _952068
906			_a7 _bcbc _corignew _d1 _eecip _f20 _gy-gencatlg
942			_2ddc _cBK
999			_c590508 _d590508