000 00456nam a22001457a 4500
020 _a9780070252219
040 _cNUST
082 _a621.392 NAV
100 _aNavabi, Zainalabedin
_976584
245 _aVerilog Digital System Design:
_bRegister Transfer Level Synthesis, Testbench and Verification
250 _a2nd Edition
260 _aNew Dehli:
_bMc Graw Hill Education,
_c2013.
650 _aVerilog Digital System Design
_959168
942 _2ddc
_cBK
999 _c594626
_d594626