000 00446nam a22001457a 4500
020 _a9780070252219
040 _cNUST
082 _a621.392
_bNAV
100 _aZainalabedin Navabi
_959167
245 _aVerilog Digital System Design
_bRegister Transfer Level Synthesis, Testbench, and Verification
250 _aSecond Edition,
260 _aIndia:
_bMcGraw Hill Education,
_c2013.
650 _2Verilog Digital System Design
942 _2ddc
_cBK
999 _c610298
_d610298